Pages

▼
Showing posts with label DDR2. Show all posts
Showing posts with label DDR2. Show all posts
Tuesday, April 8, 2014

Smart Length Matching - In Developement

›
In development and being fixed ?  Better support for high speed designs such as DDRx. Altium BugCrunch  #960: 'via Blog this'
Thursday, February 13, 2014

DDRx Routing Tips - Part 1

›
When routing DDRx with Altium you need to use some clever tricks or third party tools to get the job done.   Altium Bug Crunch  #960: Alti...
Friday, September 13, 2013

Excel - Conditional Formatting for Matched Net Lengths

›
Below is an example of using Green / Red (Go / No-Go) Conditional Formatting in Excel for checking matched trace length requirements. ...
Saturday, January 12, 2013

DDR2 Layout Guidelines

›
Signal Groups Recommended sequence for routing the DDR2 memory: 1. Route data 2. Route address/command 3. Route control 4. Route cloc...

Get DDR2 PCB design right the first time

›
Get DDR2 PCB design right the first time : 'via Blog this'
Thursday, January 10, 2013

DDR2 Layout Design Considerations - Freescale AN2910

›
AN2910.pdf (application/pdf Object)
Saturday, November 10, 2012

Altium Designer - UK Experts - Microdex

›
Source: Altium Designer - UK Experts - Microdex - Tips Tip #1 "Routing a bus with matched length? Use the altium designer PCB panel ...
Sunday, November 4, 2012

Design DDR, DDR2 & DDR3 - Barry Olney

›
PCB DESIGN 007 PCB Design Techniques for DDR, DDR2 & DDR3, Part 1: PCB DESIGN 007 PCB Design Techniques for DDR, DDR2 & DDR3, Part...
Friday, November 2, 2012

Altium | Welldone Blog - Fedevel

›
Altium welldone blog - Fedevel - Robert Feranec