Collisions

When working with RF Designs Collisions are a way of life.

What we have here is two parts on three pads. Actually it's two parts with overlapping pads.

Only one of the two overlapping parts will be installed at any given time.

This technique is used to minimize parasitic traces and pads (no RF stubs).  

Using this technique you can create controlled impedance routes with minimum impedance discontinuities.

To get through the Design Rule Checks (DRCs) we can either disable the check or create an exception in the rules for the overlapping parts.

I recommend solution number 2 shown below..

Solutions:

1) Disabling Component Clearance Checks (not recommended).

2) Creating a rule with exceptions for the overlapping parts. (recommended).

click on images to view


Syntax:

InComponent('C307') 

Driving Fabrication Outputs using a Variant

Driving Fabrication Outputs using a Variant | Online Documentation for Altium Products:

"This ability is an enhancement to the way in which variants can be used, it allows you to vary a fabrication output. Although it is fabrication output that is being changed, it is only changing the silkscreen output based on a variation in the component's Comment parameter. You can not change any other aspect of the fabricated board, such as the routing, the layout of the components, or the layer stack."

'via Blog this'

3D Extruded Shape Not Updating from Library

The Problem:

Below is an example of a component which does not match the part in the Library and Altium does NOT detect the difference.

Here's the part on the PCB.

Here is the part in the Library

As shown I have added a polarity mark in the 3D body using a small white triangle.

Also the part appears in the Libraries Panel with the polarity mark shown.

However selecting the Component and updating from Libraries finds NO differences.

No Differences Found

Apparently finding differences does not include extruded shapes in a 3D Body.

The Workaround:

Open the footprint *.PCBLIB file then using the PCB Library Panel Update the PCB with the footprint.

Problem Solved:

That's it

DFM - Broken Net

Here's an interesting Broken Net error reported by a fabricator using an ODB++ file generated by Altium.



The DRC checks in Altium found NO opens (Broken Nets)

Examining Net_C401-1 shows where the problem lies: 

As shown above NetC401-1 is passing across the pad of a capacitor, however there is not a connection dot in the pad.

To fix this problem we need to create separate connecting segments along the net to each pad.

There are no checks currently built into in Altium to find this reported error.

DFM - Non Plated Hole - Soldermask FHS + 10mil

Design for Manufacturability (DFM) for Non Plated Thru Hole (NPTH) the soldermask opening should be finished hole size (FHS) + 10mils.

Example: NPTH for test fixture tooling, soldermask = FHS + 10mil (0.25mm)

In Altium this means the Soldermask expansion should be +5mils (0.125mm).

You should also include a copper keep out on all layers of FHS + 10mils.

There are no Design rules or DRCs in Altium for Non-Plated Thru Holes that will catch this DFM issue.