Via Propagation Delay Notes

Interesting Links . . . 

Via Delay - Is it really a manual intervention - Altium Discussion Forums

High-Speed Constraints Values and PCB Layout Methods by Charles Pfiel

Charles Pfiel has graciously created and released an eBook.



Charles also included a nice calculator.



Here is the link for the download.

https://pcdandf.com/pcdesign/index.php/constraints

Thank you Charles Pfiel

PCB: From-To-Editor (AD14 versus AD15)

Looking at the same net using the From-to-Editor

AD14.3.18  (length 1864 mils)


AD15.1.15 (length 1965 mils)

Why the difference ?

AD14.3.18 does NOT account for the length of the vias in the routed path.

AD15.1.15 does account for the length of the vias in the routed path.

This 100 mils is a very significant difference for high-speed designs.

Use AD15.1.15 or higher to account for the vias !

That's It.

Porting iMX6 Rex to AD14

iMX6 Rex is an open source reference board designed by FEDEVEL Academy.

The reference design was originally created using a AD13.  I'm between projects so I decided to port the iMX6 Rex design to AD14.3.13 and take a look at the design.

The iMX6 Rex module is an impressive credit card size reference design.  

You can learn a lot about high speed designs from Robert Feranec who offers to share his expertise through FEDEVEL Academy.

I loaded the Rex design in AD14.3.13 and ran the DRC checks for the PCB and found 3244 violations.

I also have AD13.3.4 (the last version of AD13) loaded on my PC, so I started this exercise with AD13 which reported 864 violations.

Loaded Rex in AD13.3.4

Clearance Constraint (Gap=0.085mm) ((IsRegion AND (OnLayer('L2') OR OnLayer('L11')))),(All)

These 864 clearance errors were most likely due to differences in 'Metric Display Precision' settings' on my PC and on the original designer's PC.

DXP > Preferences > PCB Editor > General

Re-pouring the polygons corrected the clearance errors in AD13. 

The design is DRC clean in AD13.

Rex in AD14.3.13

There were 3244 DRC errors reported in AD14.3.13.  These errors include the same 864 clearance errors reported in AD13.  

There were 2380 Differential Pair Width Rule violations due to the new Diff Pair design rules introduced in AD14.3 for differential pairs.

Diff Pairs Width Rules in AD13

After transferring the above Differential Pair width rules to AD14.3 only one DRC was reported for the Uncoupled length.

I suspect the Uncoupled length error is due the length calculation differences between AD13 and AD14.  

In AD14.3 the VIA lengths are included in the length data, which appear to have affected the Uncoupled length calculation.

After changing the Uncoupled length for the 'DIFF100' from 8mm to 8.7mm the design is DRC clean in AD14.3.13

Backward compatibility to AD13 

Note, there will be an extra set of width rules for the Diff Pairs which are not needed in AD14.3. 

If you do NOT delete the old Diff Pair width rules from AD13 then the AD14.3 design file with both old and new Diff Pair rules will be DRC clean in both AD13 and AD14.  

For backward compatibility leave the older AD13 Diff Pair width rules in the design.

Thank you Robert for sharing !

Signal Integrity Software, Inc | SiSoft

SiSoft Quantum-SI Export - Altium

Signal Integrity Software, Inc | SiSoft:

Please leave a comment if you have any experience with Altium > SiSoft.

'via Blog this'

High Speed PCB Design

High Speed PCB Design:

Some basic trace length 'rules of thumb' and a critical length calculation example.

'via Blog this'

Interactive Length Tuning Keys