Altium design secret 17: How to use Via Stitching for advanced copper thieving/venting patterns
In the above video link there is a long and awkward process presented for creating thieving patterns.
IMO, thieving patterns should be simplified to convert a "polygon to a thieving pattern" The user would be presented with options to create square, round or diamond patterns.
The user should be able to edit the polygon border and re-generate the thieving pattern.
Cast your vote at: https://bugcrunch.live.altium.com/#Idea/1851
Tuesday, May 31, 2016
Friday, May 27, 2016
Planes and Through Hole Pins
Typical designs have through hole pins for headers and connectors.
What is often overlooked is additional clearance needed to create the specified finished hole size (FHS) for pins that pass through the planes.
Design rules can be used to increase the anti-pad (copper clearance) that surrounds each pin that passes through a plane.
Example feedback from PCB fabricator:
The 43 mil holes are drilled at 47.2 mil and 59 mil holes are drilled at 63 mil to achieve the specified finished hole size after plating. After drilling the holes are 6 mils away from copper.
Can we increase the hole edge to copper spacing to prevent CAF issue ?
Problem:
The design is using a global minimum Plane Clearance rule (8mil).
The global minimum of 8 mils is adequate for small vias and tracks. However additional clearance is needed for through hole pins to prevent Conductive Anodic Filaments (CAF).
Solution:
Use design rules to increase the copper clearances for pins that pass through plane layers.
Through hole pins with 12 mil clearance.
That's It !
What is often overlooked is additional clearance needed to create the specified finished hole size (FHS) for pins that pass through the planes.
Design rules can be used to increase the anti-pad (copper clearance) that surrounds each pin that passes through a plane.
Example feedback from PCB fabricator:
The 43 mil holes are drilled at 47.2 mil and 59 mil holes are drilled at 63 mil to achieve the specified finished hole size after plating. After drilling the holes are 6 mils away from copper.
Can we increase the hole edge to copper spacing to prevent CAF issue ?
Problem:
The design is using a global minimum Plane Clearance rule (8mil).
The global minimum of 8 mils is adequate for small vias and tracks. However additional clearance is needed for through hole pins to prevent Conductive Anodic Filaments (CAF).
Solution:
Use design rules to increase the copper clearances for pins that pass through plane layers.
Through hole pins with 12 mil clearance.
That's It !
Tuesday, May 24, 2016
Inner Planes - Missing Connection Markers
This 16 layer design has 6 plane layers.
AD16.1.8 is displaying the plane connections on only 4 of 6 plane layers.
L2 Plane is showing connections to the plane.
L4 Plane is showing connections to the plane.
L6 Plane is NOT showing connections to the plane.
L11 Plane is NOT showing connections to the plane.
L13 Plane is showing connections to the plane.
L15 Plane is showing connections to the plane.
That's It !
AD16.1.8 is displaying the plane connections on only 4 of 6 plane layers.
L2 Plane is showing connections to the plane.
L4 Plane is showing connections to the plane.
L6 Plane is NOT showing connections to the plane.
L11 Plane is NOT showing connections to the plane.
L13 Plane is showing connections to the plane.
L15 Plane is showing connections to the plane.
That's It !
Tuesday, May 17, 2016
Wednesday, May 11, 2016
Live Drill Table = Slow Performance
I'm currently working on a fairly complicated 16 layer design which has 3000+ vias.
This is a second spin due to feature creep.
click on images to view
Live Drill Table (3178 Driils)
I was experiencing very slow and sluggish performance while placing new vias, moving existing vias or deleting vias.
So the troubleshooting began:
At first I suspected active online DRC checking. After some further investigation I determined the sluggish performance was due to the Live Drill table.
Test:
Open any large design in Altium with a live Drill table, select the P then V key and start placing vias, there will be a long delay (~ 2 seconds) between the via placements.
Work around:
Delete the Live Drill table. Place the drill table after all routing is done.
Idea:
Stop updating the Live Drill Table if it is NOT visible.
Note: The managed release will fail to generate the fabrication outputs (Gerbers) if the drill table is missing (not placed) in the design.
That's It !
This is a second spin due to feature creep.
click on images to view
Live Drill Table (3178 Driils)
I was experiencing very slow and sluggish performance while placing new vias, moving existing vias or deleting vias.
So the troubleshooting began:
At first I suspected active online DRC checking. After some further investigation I determined the sluggish performance was due to the Live Drill table.
Test:
Open any large design in Altium with a live Drill table, select the P then V key and start placing vias, there will be a long delay (~ 2 seconds) between the via placements.
Work around:
Delete the Live Drill table. Place the drill table after all routing is done.
Idea:
Stop updating the Live Drill Table if it is NOT visible.
Note: The managed release will fail to generate the fabrication outputs (Gerbers) if the drill table is missing (not placed) in the design.
That's It !
Wednesday, May 4, 2016
Monday, May 2, 2016
Importing 274X Gerbers
Example of Importing Top Layer 274x Gerber data into Altium.
Open the Top Gerber layer in CAMTastic.
Add a new layer to the CAM file and name it drill. Edit > Layers > Add
Go to Tables > NC Tools and create a new small drill, example 10 mil.
Set CAMTastic to drill mode by going to View > NC Editor.
In NC Editor Mode go to Place > Drill > Point and place a small drill inside one of the mounting hole flashes.
Tables > Layers, set Top to Top and set Drill to Drill Int.
Tables > Layers order, click the Physical Layers column for top and set it to 1.
Tables > Layers > Enable (Select On) for the layers to export.
Go to Tools > Netlist > Extract.
Select File > Export > Export to PCB.
Done !
Open the Top Gerber layer in CAMTastic.
Add a new layer to the CAM file and name it drill. Edit > Layers > Add
Go to Tables > NC Tools and create a new small drill, example 10 mil.
Set CAMTastic to drill mode by going to View > NC Editor.
In NC Editor Mode go to Place > Drill > Point and place a small drill inside one of the mounting hole flashes.
Tables > Layers, set Top to Top and set Drill to Drill Int.
Tables > Layers order, click the Physical Layers column for top and set it to 1.
Tables > Layers > Enable (Select On) for the layers to export.
Go to Tools > Netlist > Extract.
Select File > Export > Export to PCB.
Done !
Tip: Go to Tables > Layers > Review the Type column after the layer name. You need at least one layer to be the Top layer. If all of your copper layers are Internal...it will not export. Be sure to specify at least one drill layer as Drill Top if you are importing drills into Camtastic.
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