Saturday, December 10, 2016

NPTH - Non Plate Thru-Hole

Creating a NPTH requires proper soldermask expansion and copper pullback from the edge of the hole.

3D Color View



If the design calls for a NPTH as show above (P2) a circle arc can be used to create the ring around the un-plated hole.


Note that the soldermask was not pulled back from the edge of the hole for P1.

The designer of this NPTH will get a technical query from the PCB fabricator asking for permission to pull back the soldermask from the edge of the hole.

Shown in 2D the soldermask is correctly pulled back from the edge of the hole for P2.


































Are we done Now ?

.
.
.
.
.

Before answering that question, let's look at typical surface mount pad.














Note soldermask expansion, which is typically 4 mils.

The soldermask registration accuracy needs to be considered.

More work is needed to properly finish this NPTH.

Let's add a 5mil expansion to the arc (full circle)







































Ok, now we are done. P2 is good to go.
















There may be other factors to consider, like copper pours with same or different net than the ring around the hole.


That's It !

Thursday, December 8, 2016

Vias - Show Net Names

Recently I reviewed a design where the Net names where not displayed in the Vias.


I prefer to see the net names.

To display the net names press "L"  and select Show Via Nets in View Options.

click on image to view




























That's It !

Altium DXP Developer | Online Documentation for Altium Products

Altium DXP Developer | Online Documentation for Altium Products:

'via Blog this'

ADIVA Corporation

"ADIVA Announces Version 9.1 for Windows 7 thru 10. Design validation has advanced another step with ADIVA's newest Release 9.1. 

This release includes a new interface to Altium Designer as well as enhanced support for Back Drill and Micro-Vias. "

Source: ADIVA Corporation:

'via Blog this'

Thursday, December 1, 2016

Releasing a Design with the Project Releaser | Online Documentation for Altium Products

Bookmark for AD17 Project Releaser

"And while the Project Releaser will automatically determine the mode where possible, or offer options where that is not so clear cut, you can always force the use of Offline mode. The latter is performed by setting the Release Target to Folder, on the Release Options tab of the Project Release Options dialog (click the Options button, while at Stage 1 of the release process)."


Source: Offline Release Mode



Or the full Monty:


Releasing a Design with the Project Releaser | Online Documentation for Altium Products:


'via Blog this'

Monday, November 28, 2016

Script - MechanicalReMapper.pas v1.04 - Altium Discussion Forums

Script - MechanicalReMapper.pas v1.04 - Altium Discussion Forums

"This version has a known bug with the PCB Layer Pairs. So if you have them in a PCB, check that they are still correct after running the script. No other bugs are known."

'via Blog this'

Thursday, November 10, 2016

Database Libraries for DBLib and SVNDBLib

Here are some good tips for anyone planning to create a database for Altium DBLib or SVNDBLib libraries. Speed Up Your Access Database - PerformanceTips - Microsoft

Parts is a free turn key working Access database for DBLib and SVNDBLib libraries.

The Parts download includes an optional (not required) Frontend application that greatly simplifies creating parts and library maintenance.  Parts can support 20 to 50 users.

You can purchase keys for the Parts Frontend or create your own Frontend for the database. 

Get on the fast track with Parts.

If you are looking for a database with a web browser interface, take a look at ADLib.

ADLib - Libraries Built to Last - Nine Dots Connect

That's It !

Thursday, November 3, 2016

Test Point Clearances

Test Point to Test Point

InComponent('Tp*') and OnBottomLayer  





















Any Test Point to Any Component on Bottom Layer


InComponent('*') and OnBottomLayer 






Related Links:

Design for Fixture Guidelines - ECT Aug 2014 Rev L

That's it!

InRegion(3947,276,6196,1267)

Why use a region if you can use a room to define an area on the PCB?

Answer:

Rooms can only be used define an area on the Top or Bottom layers where the components are placed. While InRegion can be used to define an area on any layer of the design.

Key points for using InRegion:

1)  "All coordinates are referenced to the absolute origin (and not to the user origin or component insertion point), and at present, all coordinates always use units of mils. (1 mil = 0.001 inch)"

Syntax:

InRegion(X1 : Distance_String , Y1 : Distance_String , X2 : Distance_String , Y2 : Distance_String) : Boolean

Tip:

Use a temporary Fill to determine coordinates for X1,Y1,X1,X2

























Links: 


That's it !

Friday, October 21, 2016

Variants - Remove Solder Paste

Steps:

In the schematic select the DNI's with the Cross Select mode enabled.

Create a temporary blank PCB.  Set the origin and cut paste the selected DNI components using paste special (EA) to preserve the reference designators.

Use paste expansion override to remove the paste from all pads. Using Find Similar select and delete solder paste fills and regions or reduce paste size as needed.

Copy and paste the modified footprints in the temporary PCB to the original design, use paste special (EA), preserve the reference designators.

That's It

Thursday, October 20, 2016

True Variants | Online Documentation for Altium Products

True Variants | Online Documentation for Altium Products:

"There is also support for variations to component overlay information on the PCB, for example changing a components comment. This type of variation requires 2 overlay screens to be produced, resulting in 2, different bare boards. This type of variant is referred to as a Fabrication Variant."

'via Blog this'

Footprint - Update Solder Paste


Ver AD16.1.12 

To update solder paste you must also select "On Other Layers"




Wednesday, September 28, 2016

Reset Unique IDs

In Sch editor, click command Tools » Convert » Reset Component Unique IDs



How did I end up with duplicate unique IDs ?  A new design was pulled together using sheets from prior designs.  

A couple of the sheets were duplicated in a new design using Save As to create some redundant circuitry.  

For example XVCR sheet was copied and saved as XCVR1 then again as XCVR2. Then both sheets were added to the project.

Anyway, it was NO big deal and was easy to fix because the PCB had not been started.

That's it !

Thursday, August 18, 2016

Rooms - Transparency

Here's a teaser. . . 

What's looks like a bunch of shorted nets?


Its a room !


This occurs when the Transparency setting is 0% for the rooms.

Fix: Change View Options > Transparency for Rooms to 60%
















That's It !

Tear Drops - Bug

As shown below there is a bug in the tear drops, not all vias have tear drops.




Using Tools > Teardrops > Add > All > Vias



























The work around:

Shelve the polygons first, then create the teardrops, then re-pour the Polygons.

Now the teardrops are properly generated.





















Altium should alert the user to shelve the polygons before generating teardrops.

Idea: create a smarter algorithm for generating the teardrops.  Example ignore the teardrop / polygon violations while generating the teardrops, then fix the polygons during the next pour.

That's it !

Wednesday, August 17, 2016

Clearance Rule for Vias and Keepout

Vias violating clearance rule, where a No Net Keepout is being used.

Using the rule below I'm able use the keepout,  In the past I would replace the keepout with a polygon cutout. 

The end result is the same, however by using this rule I'm able to avoid creating the polygon cutout.

click on images to view



Clearance Rule

























OnLayer('L2 - GND PLANE') and IsKeepOut  

and 

IsVia


Different Nets

Min Clearance 3 mils (or what floats your boat).

That's It !

Monday, August 1, 2016

xSignals - Edit Class

In the PCB Panel you can Double Click on the xSignal Class to edit the Class.

Click on image to View

























The formula xSignals uses to calculate the via-used length is:


StartLayerCopper/2+(Layers between StartLayerCopper and StopLayerCopper)+StopLayerCopper/2.


That's it! 

Monday, July 18, 2016

Using Special Strings - VersionControl_RevNumber

If you wish to display the same SVN Ver on all of your Schematic pages and *.PCBDoc.

*.SchDoc - Special String =VersionControl_RevNumber












*.Pcbdoc Special String .VersionControl_RevNumber















AD16.1.12 

SVN# .VersionControl_RevNumber





















In the Project Panel > Right Click on Source Documents > Open All.

Then RClick Source Documents > Save All. 

Then RClick on the Project.PrjPcb > Version Control > Commit Whole Project.

The .VersionControl_RevNumber works in the PcbDoc, however you may need to save, close and open the Pcbdoc to display the special stringl .VersionControl_RevNumber.


You may need to first enter .VersionControl_RevNumber then edit the text string and add any prefixes or suffixes as desired, i.e. SVN# .VersionControl_RevNumber

The '.VersionControl_RevNumber' bug. Notice Altium will add leading and trailing single quote characters to .VersionControl_RevNumber string in the PCB editor, you must also remove the quotes.

In the schematic if the SVN Ver Number is not displayed, try holding down your Ctrl Key and roll the mouse wheel, the page should refresh and display the =.VersionControl_RevNumber string.



One more PCB Special String Syntax example:

'.PCB_Fab_Dwg' REV '.PCA_Assy_Rev'









That's It