Friday, December 23, 2022

Directive Blanket - Edit and Reshape

Select a mid point handle in the existing blanket with LMB, then tap the insert key and drag.

Or redraw the blanket using a series of LMB clicks

The LMB click points were made at each inside and outside corner.

That's it !

Sunday, December 4, 2022

Electra Panels

Right Click on the Main Menu to pop open the panels dialog.

That's it !

Tuesday, November 15, 2022

Annotate Reference Designators from a Text File

One method is to use Schematic Editor > Tools > Annotate > Back Annotate Schematics and load in a Was-Is file. The Was-Is file is simply a text file with the current designator a space (not tabs) and the new designator on each line.

C1 C4
C2 C3
C3 C2
C4 C1

The file name has a .was extension.
This will change both the schematic and the PCB designators, not just the PCB designators.
Copy / pasting from Excel to a text editor works but you will have to change all the delimiters from tabs to spaces. 

If you want to change only the PCB side then paste into the string column of the designators in the PCB List panel and re-link components by designator should work.

Source: 

Annotate Reference Designators from a text file? - Altium Discussion Forums - Eric Albach

That's it ! 

Thursday, November 3, 2022

NetTies and PAD Classes

Pad Class can be used to suppress Net Tie Hole to Hole Violations.

As shown below two multilayer pads were place on top of each other to create Net Ties that can be used to connect tracks or copper on any layers.


Design > Classes > Pad Class > NetTie PADs


Design > Rules > HoleToHoleClearanceNetTies

That's it !

Monday, October 24, 2022

Electra Do File Tweaks

To clear existing routed tracks and vias.

Altium > PCB Fliter > (IsTrack or isVia) and OnSignal and not InNet('GND') and not InAnyDifferentialPair

Altium > Delete Filtered Selection

Altium > Script > Export Specctra DSN

Electra > Open DSN

AutoRoute > Strategy > Edit Script

 


To Prevent Electra from Crashing . . . first strip out web page characters.

Copy and Paste the text below to Notepad before pasting in Electra !


# Start My Do Tweaks

select all nets
unselect net GND
unprotect all wires
unprotect all vias

lock net GND
protect net GND
protect all dpairs

# End My Do Tweaks


Electra >  Run Do > Export Routes


Altium > Files > Import Routes
PCB Filter > Istrack and OnSignal and not InAnyDifferentialPair

Altium > Route  > Retrace Selected (Shortcut Keys UC)

That's it !

Thursday, October 13, 2022

Tools > Import / Export Mechanical Layers

Tools > Import / Export Mechanical Layers

Includes Layer Pairs

That's it !

Monday, September 12, 2022

Altium Export to Specctra and Electra

* Altium - Use Net Class Directives for Diff Pairs instead of Diff Pair Directives.

* Altium - Delete all Solid Polygons or use Hatched Polygons.

* Altium - Simplify the design rules, i.e. Clearance All 7mils and not InAnyDifferentialPair

* Altium - Simplify the design rules for trace width, i.e. 5mils

* Altium - Use only one drill size when exporting to Specctra

* Altium - Use only Thru-Hole and Blind Vias

* Altium - Copy the board outline to the Keepout layer to keep routes inside the borders.

* Altium - Export Specctra *.dsn file.

* Electra - Fanout GND Vias. Protect and then Unselect Net GND (Do Not Route GND)

* Electra - Run the Router and Export the the Routes.

* Altium - Import the Routes *.rte file.

* Altium - Run DRC Checks and Cleanup routes as needed.

* Altium - Clean up Diff Pairs using Find Similar and Retrace.

* Altium - Net Antennae Design Rule NOT ((ObjectKind = 'Via') And (Net = 'GND'))

Ensuring PCB Readiness for Specctra-compatible Routers in Altium Designer

Bugs and Tips:

https://forum.live.altium.com/#/posts/251575/797738

https://forum.live.altium.com/#/posts/254379/812665

Related Links: DFM (MakeDo)

That's it !


Sunday, July 31, 2022

Unique ID - Show Enabled

To Show the Unique ID

click on image to view


 














Preferences > General > Advanced > System.UI.IPP.ShowUniqueID









Related Link:  AD22.7.1 Variant Fitted / Not-Fitted Parts Bug 

Thank you Dennis !. 

Saturday, July 30, 2022

AD22.7.1 Variant = DNI - Fitted / Not Fitted Bug

 DNI - L202 ?  Not-Fitted on Assy Dwg






















L202 is shown as Fitted in the Schematic DNI Variant





















Current Variant = DNI













Houston, we have a problem. Red = DNI on Assy Dwg
Specifically note L202 and more bogus looking DNIs on the Assy dwg

Looking at the project *.PrjPcb file in Notepad++

I see multiple entries for L202 and several other duplicated designators with different Unique IDs.





Also I see U? & H? however there are no un-annotated components in the design.

Suggested Workaround

Print a PDF version of the existing schematic for reference and sanity checks.

Use a customized BOM to find the correct Unique ID for the Designators.

Or review the Unique ID for each component:

Preferences > General > Advanced > System.UI.IPP.ShowUniqueID

Related Link:   Unique ID - Show Enabled

Close Altium and use a text editor to delete the incorrectly duplicated designators in the *.PrjPcb file. Then open the project in Altium and review the schematics and drawings.


Comments to my Customer 

We will need to work together to get through this DNI bug I found in the Ceres3 project.

Just curious . . .

How did Ceres3 come into being ?  
Cloned A365 or a Copied project file ?

How did this Happen ?

Note the engineer did not intentionally reset any Unique IDs by using a Unique ID Reset button or script.

Engineers will save one or more Schematic.SchDoc files from a project then add the saved Schematic.SchDoc files to a different project.

When a Schematic.SchDoc is added to another project there may be duplicate designators depending on what designators are already in other sheets.

Next the engineer re-annotates the sheets to resolve the duplicate Designators and now the Variant data in the *.PrjPcb file is a Train Wreck.

Also there is a statically rare but not impossible chance that one or more Unique IDs could be duplicated.

You may have a better understanding how this happens after reading these links

Component Links - Part 1
Component Links - Part 2

Observations:
 
Looking at L202 in the *.PrjPcb file
 
Variation46=Designator=L202|UniqueId=\VWGFHICD|Kind=0|AlternatePart= 
 
A fitted component (Kind=0) with NO Alternate Part does not need to be included in the Project Variant data that is stored in the *.PrjPcb file.
 
As shown in Draftsman L202 was shown as Not-Fitted while in Schematic L202 is shown as Fitted.  This leads me to believe that the code base (Algorithm)  used to determine which parts are not fitted is not consistent between the Schematic and Draftsman,
 
It appears to me the Schematic is updated by reading all of the Variations found in the *.PrjPcb file and using the last found Variation for the designator.
 
It appears to me the Draftsman drawing is updated by reading the Variations found in the *.PrjPcb file and using the first found Variation for the designator. 
 
Unique IDs for every component in the design are not included in the *.PrjPcb file, therefore when Draftsman is reading the *.PrjPcb file and updating the drawing it must be assuming the first found Variation for L202 is correct regardless of the Unique ID which did not match the Unique ID of the part in the schematic.
 
In the case of duplicated Designators my findings indicate that the last entry of the same Designator for the Variation in the *.PrjPcb file is correct while the previous entries may or may not be correct.
 
 
Possible Solutions and Suggestions:
 
Draftsman should be updated by reading all of the Designator Variations found in the *.PrjPcb file and using the last found Variation for the designator.
 
Suggestion, remove unused variations from the *.PrjPcb file, for example . . .
Variation46=Designator=L202|UniqueId=\VWGFHICD|Kind=0|AlternatePart=
 
Because a fitted component (Kind=0) with NO Alternate Part does not need to be included in the Project Variant data that is stored in the *.PrjPcb file.

When the user re-annotates the Designators in a Project that would the appropriate time to cleanup the *.PrjPcb file.

End of Story !

Friday, July 29, 2022

Best Fonts to Use in Altium

I hope that someday Altium will give us a Font Wizard that will allow the user to choose Fonts in one place for all of the unified tools in Altium. 

Currently trying to hunt down where all of the font settings are in Altium is mind numbing.

My favorite schematic font is Arial Narrow because I can see the underscore_characters. Where in the Times Roman the _ is obscured.

My thinking is that Arial is a universal font, however 
the down side of using Arial is the confusion between the I (eye) and the l (el).

Consolas 11pt looks nice, that might be my new fav.

Unlike Arial there no confusion between the I (eye) and the l (el).

Also the O and 0 look better in Consolas.

See example fonts below

Arial (Underscore_Visible)
Times Roman (Underscore_Obscured)
Consolas (Underscore_Visible)
Calbri (Underscore_Visible)

Related Link: https://forum.live.altium.com/#/posts/251922/799803

That's it !

Monday, July 25, 2022

Connection lines do not appear when dragging a component

View Configuration > View options > Dimmed Objects












I was playing with the "N" shortcut to "show" and "hide" connections for a particular component. However, one time I must have had the component selected and was moving it when I typed the "N". After that, I could no longer see any connection lines when moving any component. Apparently, if you type "N" while moving a component it changes a mode called the "Net Line Connect Mode" from "Pad to Pad" to "Hidden". The way I finally spotted this was by looking at the "Heads Up Display" as I was moving a component and saw that this mode had been changed to "Hidden".

Tip 1: Try Tapping the N key to Toggle the connection lines while moving a component.


Thank you Thomas

Tip 2: Tap the [ key to Decrease Mask Level.  Tap the ] key Decrease Mask Level.

Source: Randy Clemmons.

That's it !